#ifndef EMS_TABLE_H
#define EMS_TABLE_H
#include "TableInterface/table.h"


#define EMS_TABLE \
{ \
    TABLE_ENTRY_INIT(20000, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20001, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20002, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20003, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20004, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20005, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20006, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20007, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20008, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20009, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20010, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20011, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20012, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20013, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20014, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20015, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20016, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20017, TEA_RD, TABLE_MSGVAL_TIME), \
    TABLE_ENTRY_INIT(20018, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20019, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20020, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20021, TEA_RD, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(20022, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20023, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20024, TEA_RD, TABLE_MSGVAL_MODE), \
    TABLE_ENTRY_INIT(20025, TEA_RD, TABLE_MSGVAL_MODE), \
    TABLE_ENTRY_INIT(20026, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20027, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20028, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20029, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20030, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20031, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20032, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20033, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20034, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20035, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20036, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20037, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20038, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20039, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20040, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20041, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20042, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20043, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20044, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20045, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20046, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20047, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20048, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20049, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20050, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20051, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20052, TEA_RD, TABLE_MSGVAL_ELEC_QUTT), \
    TABLE_ENTRY_INIT(20053, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20054, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20055, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20056, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20057, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20058, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20059, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20060, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20061, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20062, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20063, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20064, TEA_RD, TABLE_MSGVAL_TEMP), \
    TABLE_ENTRY_INIT(20065, TEA_RD, TABLE_MSGVAL_TIME), \
    TABLE_ENTRY_INIT(20066, TEA_RD, TABLE_MSGVAL_TIME), \
    TABLE_ENTRY_INIT(20067, TEA_RD, TABLE_MSGVAL_TIME), \
    TABLE_ENTRY_INIT(20068, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20069, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20070, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20071, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(20072, TEA_RD, TABLE_MSGVAL_FPGA), \
    TABLE_ENTRY_INIT(10000, TEA_RDWR, TABLE_MSGVAL_MODE), \
    TABLE_ENTRY_INIT(10001, TEA_RDWR, TABLE_MSGVAL_MODE), \
    TABLE_ENTRY_INIT(10002, TEA_RDWR, TABLE_MSGVAL_MODE), \
    TABLE_ENTRY_INIT(10003, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10004, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10100, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10101, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10102, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10103, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10104, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10105, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10106, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10107, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10108, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10109, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10110, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10111, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10112, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10113, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10114, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10115, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10116, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10117, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10118, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10119, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10120, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10121, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10122, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10123, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10124, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10125, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10126, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10127, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10128, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10129, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10130, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10131, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10132, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10133, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10134, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10135, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10136, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10137, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10138, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10139, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10140, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10141, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10142, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10143, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10144, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10145, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10146, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10147, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10148, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10149, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10150, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10151, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10152, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10153, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10154, TEA_RDWR, TABLE_MSGVAL_NONE), \
    TABLE_ENTRY_INIT(10155, TEA_RDWR, TABLE_MSGVAL_NONE), \
}


#endif
